miden_air/trace/chiplets/
mod.rs

1use core::ops::Range;
2
3use miden_core::{Felt, ONE, ZERO, utils::range as create_range};
4
5use super::{CHIPLETS_OFFSET, HASH_KERNEL_VTABLE_AUX_TRACE_OFFSET};
6
7pub mod ace;
8pub mod bitwise;
9pub mod hasher;
10pub mod kernel_rom;
11pub mod memory;
12// CONSTANTS
13// ================================================================================================
14
15/// The number of columns in the chiplets which are used as selectors for the hasher chiplet.
16pub const NUM_HASHER_SELECTORS: usize = 1;
17/// The number of columns in the chiplets which are used as selectors for the bitwise chiplet.
18pub const NUM_BITWISE_SELECTORS: usize = 2;
19/// The number of columns in the chiplets which are used as selectors for the memory chiplet.
20pub const NUM_MEMORY_SELECTORS: usize = 3;
21/// The number of columns in the chiplets which are used as selectors for the ACE chiplet.
22pub const NUM_ACE_SELECTORS: usize = 4;
23/// The number of columns in the chiplets which are used as selectors for the kernel ROM chiplet.
24pub const NUM_KERNEL_ROM_SELECTORS: usize = 5;
25
26/// The first column of the hash chiplet.
27pub const HASHER_TRACE_OFFSET: usize = CHIPLETS_OFFSET + NUM_HASHER_SELECTORS;
28/// The first column of the bitwise chiplet.
29pub const BITWISE_TRACE_OFFSET: usize = CHIPLETS_OFFSET + NUM_BITWISE_SELECTORS;
30/// The first column of the memory chiplet.
31pub const MEMORY_TRACE_OFFSET: usize = CHIPLETS_OFFSET + NUM_MEMORY_SELECTORS;
32
33// --- GLOBALLY-INDEXED CHIPLET COLUMN ACCESSORS: HASHER ------------------------------------------
34
35/// The column index range in the execution trace containing the selector columns in the hasher.
36pub const HASHER_SELECTOR_COL_RANGE: Range<usize> =
37    create_range(HASHER_TRACE_OFFSET, hasher::NUM_SELECTORS);
38/// The range of columns in the execution trace that contain the hasher's state.
39pub const HASHER_STATE_COL_RANGE: Range<usize> = Range {
40    start: HASHER_TRACE_OFFSET + hasher::STATE_COL_RANGE.start,
41    end: HASHER_TRACE_OFFSET + hasher::STATE_COL_RANGE.end,
42};
43/// The range of columns in the execution trace that contains the capacity portion of the hasher
44/// state.
45pub const HASHER_CAPACITY_COL_RANGE: Range<usize> = Range {
46    start: HASHER_TRACE_OFFSET + hasher::CAPACITY_COL_RANGE.start,
47    end: HASHER_TRACE_OFFSET + hasher::CAPACITY_COL_RANGE.end,
48};
49/// The range of columns in the execution trace that contains the rate portion of the hasher state.
50pub const HASHER_RATE_COL_RANGE: Range<usize> = Range {
51    start: HASHER_TRACE_OFFSET + hasher::RATE_COL_RANGE.start,
52    end: HASHER_TRACE_OFFSET + hasher::RATE_COL_RANGE.end,
53};
54/// The index of the hasher's node index column in the execution trace.
55pub const HASHER_NODE_INDEX_COL_IDX: usize = HASHER_STATE_COL_RANGE.end;
56
57// --- GLOBALLY-INDEXED CHIPLET COLUMN ACCESSORS: BITWISE -----------------------------------------
58
59/// The index within the main trace of the bitwise column containing selector indicating the
60/// type of bitwise operation (AND or XOR)
61pub const BITWISE_SELECTOR_COL_IDX: usize = BITWISE_TRACE_OFFSET;
62/// The index within the main trace of the bitwise column holding the aggregated value of input `a`.
63pub const BITWISE_A_COL_IDX: usize = BITWISE_TRACE_OFFSET + bitwise::A_COL_IDX;
64/// The index within the main trace of the bitwise column holding the aggregated value of input `b`.
65pub const BITWISE_B_COL_IDX: usize = BITWISE_TRACE_OFFSET + bitwise::B_COL_IDX;
66/// The index range within the main trace for the bit decomposition of `a` for bitwise operations.
67pub const BITWISE_A_COL_RANGE: Range<usize> = Range {
68    start: BITWISE_TRACE_OFFSET + bitwise::A_COL_RANGE.start,
69    end: BITWISE_TRACE_OFFSET + bitwise::A_COL_RANGE.end,
70};
71/// The index range within the main trace for the bit decomposition of `b` for bitwise operations.
72pub const BITWISE_B_COL_RANGE: Range<usize> = Range {
73    start: BITWISE_TRACE_OFFSET + bitwise::B_COL_RANGE.start,
74    end: BITWISE_TRACE_OFFSET + bitwise::B_COL_RANGE.end,
75};
76
77/// The column index range for the main trace of the bitwise column
78pub const BITWISE_TRACE_RANGE: Range<usize> = Range {
79    start: BITWISE_TRACE_OFFSET,
80    end: BITWISE_TRACE_OFFSET + bitwise::OUTPUT_COL_IDX + 1,
81};
82
83/// The index within the main trace of the bitwise column containing the aggregated output value of
84/// the previous row.
85pub const BITWISE_PREV_OUTPUT_COL_IDX: usize = BITWISE_TRACE_OFFSET + bitwise::PREV_OUTPUT_COL_IDX;
86/// The index within the main trace of the bitwise column containing the aggregated output value.
87pub const BITWISE_OUTPUT_COL_IDX: usize = BITWISE_TRACE_OFFSET + bitwise::OUTPUT_COL_IDX;
88
89// --- GLOBALLY-INDEXED CHIPLET COLUMN ACCESSORS: MEMORY ------------------------------------------
90
91/// The index within the main trace of the column containing the memory read/write column.
92pub const MEMORY_IS_READ_COL_IDX: usize = MEMORY_TRACE_OFFSET + memory::IS_READ_COL_IDX;
93/// The index within the main trace of the column containing the memory element/word column.
94pub const MEMORY_IS_WORD_ACCESS_COL_IDX: usize =
95    MEMORY_TRACE_OFFSET + memory::IS_WORD_ACCESS_COL_IDX;
96/// The index within the main trace of the column containing the memory context.
97pub const MEMORY_CTX_COL_IDX: usize = MEMORY_TRACE_OFFSET + memory::CTX_COL_IDX;
98/// The index within the main trace of the column containing the memory address.
99pub const MEMORY_WORD_COL_IDX: usize = MEMORY_TRACE_OFFSET + memory::WORD_COL_IDX;
100/// The index within the main trace of the column containing the 0'th memory index.
101pub const MEMORY_IDX0_COL_IDX: usize = MEMORY_TRACE_OFFSET + memory::IDX0_COL_IDX;
102/// The index within the main trace of the column containing the 1st memory index.
103pub const MEMORY_IDX1_COL_IDX: usize = MEMORY_TRACE_OFFSET + memory::IDX1_COL_IDX;
104/// The index within the main trace of the column containing the clock cycle of the memory
105/// access.
106pub const MEMORY_CLK_COL_IDX: usize = MEMORY_TRACE_OFFSET + memory::CLK_COL_IDX;
107/// The column index range within the main trace which holds the memory value elements.
108pub const MEMORY_V_COL_RANGE: Range<usize> = Range {
109    start: MEMORY_TRACE_OFFSET + memory::V_COL_RANGE.start,
110    end: MEMORY_TRACE_OFFSET + memory::V_COL_RANGE.end,
111};
112/// The column index within the main trace for the lower 16-bits of the delta between two
113/// consecutive memory context IDs, addresses, or clock cycles.
114pub const MEMORY_D0_COL_IDX: usize = MEMORY_TRACE_OFFSET + memory::D0_COL_IDX;
115/// The column index within the main trace for the upper 16-bits of the delta between two
116/// consecutive memory context IDs, addresses, or clock cycles.
117pub const MEMORY_D1_COL_IDX: usize = MEMORY_TRACE_OFFSET + memory::D1_COL_IDX;
118/// The column index within the main trace for the inverse of the delta between two consecutive
119/// memory context IDs, addresses, or clock cycles, used to enforce that changes are correctly
120/// constrained.
121pub const MEMORY_D_INV_COL_IDX: usize = MEMORY_TRACE_OFFSET + memory::D_INV_COL_IDX;
122/// Column to hold the flag indicating whether the current memory operation is in the same context
123/// and same word as the previous operation.
124pub const MEMORY_FLAG_SAME_CONTEXT_AND_WORD: usize =
125    MEMORY_TRACE_OFFSET + memory::FLAG_SAME_CONTEXT_AND_WORD;
miden_air/trace/chiplets/mod.rs

miden_air/trace/chiplets/
mod.rs
