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Chiplets

miden_processor::trace::chiplets

Struct Chiplets 

Source 
pub struct Chiplets {
    pub hasher: Hasher,
    pub bitwise: Bitwise,
    pub memory: Memory,
    pub ace: Ace,
    pub kernel_rom: KernelRom,
}
Expand description

This module manages the VM’s hasher, bitwise, memory, arithmetic circuit evaluation (ACE) and kernel ROM chiplets and is responsible for building a final execution trace from their stacked execution traces and chiplet selectors.

The module’s trace can be thought of as 6 stacked segments in the following form:

  • Hasher segment: contains the trace and selector for the hasher chiplet. This segment fills the first rows of the trace up to the length of the hasher trace_len.

    • column 0: selector column with values set to ZERO
    • columns 1-16: execution trace of hash chiplet
    • columns 17-20: unused columns padded with ZERO

  • Bitwise segment: contains the trace and selectors for the bitwise chiplet. This segment begins at the end of the hasher segment and fills the next rows of the trace for the trace_len of the bitwise chiplet.

    • column 0: selector column with values set to ONE
    • column 1: selector column with values set to ZERO
    • columns 2-14: execution trace of bitwise chiplet
    • columns 15-20: unused columns padded with ZERO

  • Memory segment: contains the trace and selectors for the memory chiplet. This segment begins at the end of the bitwise segment and fills the next rows of the trace for the trace_len of the memory chiplet.

    • column 0-1: selector columns with values set to ONE
    • column 2: selector column with values set to ZERO
    • columns 3-17: execution trace of memory chiplet
    • columns 18-20: unused columns padded with ZERO

  • ACE segment: contains the trace and selectors for the arithmetic circuit evaluation chiplet. This segment begins at the end of the memory segment and fills the next rows of the trace for the trace_len of the ACE chiplet.

    • column 0-2: selector columns with values set to ONE
    • column 3: selector column with values set to ZERO
    • columns 4-20: execution trace of ACE chiplet

  • Kernel ROM segment: contains the trace and selectors for the kernel ROM chiplet * This segment begins at the end of the memory segment and fills the next rows of the trace for the trace_len of the kernel ROM chiplet.

    • column 0-3: selector columns with values set to ONE
    • column 4: selector column with values set to ZERO
    • columns 5-9: execution trace of kernel ROM chiplet
    • columns 10-20: unused column padded with ZERO

  • Padding segment: unused. This segment begins at the end of the kernel ROM segment and fills the rest of the execution trace minus the number of random rows. When it finishes, the execution trace should have exactly enough rows remaining for the specified number of random rows.

    • columns 0-4: selector columns with values set to ONE
    • columns 5-20: unused columns padded with ZERO

The following is a pictorial representation of the chiplet module:

            +---+--------------------------------------------------------------+------+
            | 0 |                                                              |------|
            | . |         Hash chiplet                                         |------|
            | . |         16 columns                                           |------|
            | . |       constraint degree 8                                    |------|
            | 0 |                                                              |------|
            +---+---+------------------------------------------------------+---+------+
            | 1 | 0 |                                                      |----------|
            | . | . |                  Bitwise chiplet                     |----------|
            | . | . |                    13 columns                        |----------|
            | . | . |               constraint degree 5                    |----------|
            | . | . |                                                      |----------|
            | . | 0 |                                                      |----------|
            | . +---+---+--------------------------------------------------+-----+----+
            | . | 1 | 0 |                                                        |----|
            | . | . | . |            Memory chiplet                              |----|
            | . | . | . |              15 columns                                |----|
            | . | . | . |          constraint degree 9                           |----|
            | . | . | 0 |                                                        |----|
            | . + . +---+---+----------------------------------------------------+----+
            | . | . | 1 | 0 |                                                         |
            | . | . | . | . |          ACE chiplet                                    |
            | . | . | . | . |            16 columns                                   |
            | . | . | . | . |        constraint degree 5                              |
            | . | . | . | 0 |                                                         |
            | . + . | . +---+---+---------------------------+-------------------------+
            | . | . | . | 1 | 0 |                           |-------------------------|
            | . | . | . | . | . |     Kernel ROM chiplet    |-------------------------|
            | . | . | . | . | . |     5 columns             |-------------------------|
            | . | . | . | . | . |     constraint degree 9   |-------------------------|
            | . | . | . | . | 0 |                           |-------------------------|
            | . + . | . | . +---+---+-----------------------+-------------------------+
            | . | . | . | . | 1 | 0 |-------------------------------------------------|
            | . | . | . | . | . | . |-------------------------------------------------|
            | . | . | . | . | . | . |-------------------------------------------------|
            | . | . | . | . | . | . |-------------------------------------------------|
            | . | . | . | . | . | . |-------------------- Padding --------------------|
            | . + . | . | . | . | . |-------------------------------------------------|
            | . | . | . | . | . | . |-------------------------------------------------|
            | . | . | . | . | . | . |-------------------------------------------------|
            | . | . | . | . | . | . |-------------------------------------------------|
            | 1 | 1 | 1 | 1 | 1 | 0 |-------------------------------------------------|
            +---+---+---+---+---------------------------------------------------------+

Fields§

§hasher: Hasher§bitwise: Bitwise§memory: Memory§ace: Ace§kernel_rom: KernelRom

Implementations§

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impl Chiplets

Source

pub fn new(kernel: Kernel) -> Self

Returns a new Chiplets component instantiated with the provided Kernel.

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pub fn trace_len(&self) -> usize

Returns the length of the trace required to accommodate chiplet components and 1 mandatory padding row required for ensuring sufficient trace length for auxiliary connector columns that rely on the memory chiplet.

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pub fn bitwise_start(&self) -> RowIndex

Returns the index of the first row of Bitwise execution trace.

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pub fn memory_start(&self) -> RowIndex

Returns the index of the first row of the Memory execution trace.

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pub fn ace_start(&self) -> RowIndex

Returns the index of the first row of KernelRom execution trace.

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pub fn kernel_rom_start(&self) -> RowIndex

Returns the index of the first row of KernelRom execution trace.

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pub fn padding_start(&self) -> RowIndex

Returns the index of the first row of the padding section of the execution trace.

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pub fn append_range_checks(&self, range_checker: &mut RangeChecker)

Adds all range checks required by the memory chiplet to the provided `RangeChecker`` instance.

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pub fn into_trace(self, trace_len: usize) -> ChipletsTrace

Returns an execution trace of the chiplets containing the stacked traces of the Hasher, Bitwise, ACE, Memory chiplets, and kernel ROM chiplet.

Trait Implementations§

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impl Debug for Chiplets

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fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more

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